1. Field of the Invention
This invention pertains generally to memory devices, and more particularly to control circuits within memory devices.
2. Description of Related Art
Memory devices as well as many other electronic circuits incorporate memory cells within which are retained bits of digital data. These memory cells can be static or dynamic in nature. In dynamic random access memory (DRAM) the memory cells are so volatile that a charge restoring operation is needed to maintain cell information. This charge-restoration operation is referred to as a refresh operation, such as performed by a memory controller. Depletion of the charge from the memory cell arises through several leakage sources. A major portion of the leakage arises from a sub-threshold leakage current which constitutes a major portion of the total leakage current. In a conventional DRAM cell organization which shares a bitline among many memory cells, the shortest data retention time arises during memory block activation.
Accordingly, a need exists for circuits and methods for reducing leakage current within memory circuits, and in particular dynamic memory circuits. These needs and others are met within the present invention, which overcomes the deficiencies of previously developed circuits and methods.